LogicSim Desciption:

LogicSim is an affordable and user-friendly Verilog simulator for ASIC and FPGA design verification. It offers a powerful and easy-to-use graphical user interface that lets you quickly simulate your Verilog designs. It's built on our state-of-the-art single kernel simulation engine MULCORED (Multi-Core Event Distribution) technology. Features : Verilog simulator and debugger, supporting full IEEE 1364-2001 Verify behavioral and RTL models with functional simulation Verify pre/post-layout gate-level netlist with SDF back-annotation timing simulation Debug and trace simulation signals with user-friendly waveform viewer Create Verilog, SystemVerilog, VHDL, and SystemC source code with powerful HDL editor Export VCD waveform to third-party waveform viewers Fast RTL simulation speed, supporting multi-million gate designs Save design verification time, dramatically reduce ASIC and FPGA development time Easy-to-use and powerful user interface, ease verification debugging pain The most affordable and complete logic simulator, offering FREE LIFETIME UPGRADE

License: Shareware | Price: $99.00 | Size: 9.4 MB | Downloads (325)

Platform: Windows XP, Windows 2003 , Windows Vista